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ds07-12506-4e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89150/150a series mb89151/151a/152/152a/153/153a/154/154a/155/155a mb89p155/pv150 n description the mb89150/a series has been developed as general-purpose version of the f 2 mc*-8l family consisting of proprietary 8-bit, single-chip microcontrollers. in addition to a compact instruction set, the mb89150 series microcontrollers contain a variety of peripheral functions such as dual-clock control system, five operating speed control stages, timers, a serial interface, a remote control transmission output, external interrupts, an lcd controller/driver, an lcd booster, and a watch prescaler. *: f 2 mc stands for fujitsu flexible microcontroller. n features ?f 2 mc-8l family cpu core ? dual-clock system ? high-speed processing at low voltage ? minimum execution time: 0.95 m s/2.7 v, 1.33 m s/2.2 v ? i/o ports: max. 43 channels ? 21-bit time-base timer ? 8/16-bit timer/counter: 1 channel (8 bits 2 channels) ? 8-bit serial i/o: 1 channel ? lcd controller/driver: max. 36 segments 4 commons (built-in booster) ? remote control transmission output (continued) n package 80-pin plastic qfp 80-pin plastic lqfp 80-pin ceramic mqfp 80-pin plastic lqfp (fpt-80p-m06) (fpt-80p-m11) (fpt-80p-m05) (mqp-80c-p01)
2 mb89150/150a series (continued) ? buzzer output ? watch prescaler (15 bits) ? external interrupts (wake-up function) four independent channels with edge detection function plus eight level-interrupt channels n product lineup (continued) mb89152/a mb89153/a mb89154/a mb89155/a mb89p155 mb89 pv150 classification mass production products (mask rom products) one-time prom product piggyback/ evaluation product (for evaluation and development) rom size 4 k 8 bits (internal mask rom) 6 k 8 bits (internal mask rom) 8 k 8 bits (internal mask rom) 12 k 8 bits (internal mask rom) 16 k 8 bits (internal mask rom) 16 k 8 bits (internal prom, programming with general- purpose eprom programmer) 32 k 8 bits (external rom) ram size 128 8 bits 256 8 bits 512 8 bits cpu functions number of instructions: 136 instruction bit length: 8 bits instruction length: 1 to 3 bytes data bit length: 1, 8, 16 bits minimum execution time: 0.95 m s/4.2 mhz interrupt processing time: 8.57 m s/4.2 mhz ports i/o port (n-ch open-drain): 8 (6 ports also serve as peripherals, 3 ports are a high-current drive type.) output port (n-ch open-drain): 18 (16 ports also serve as segment pins, 2 ports serve as boost capacitor connection pins.) *1 i/o port (cmos): 16 (12 ports also serve as an external interrupt.) output port (cmos): 1 (also serves as a remote control.) total: 43 (max.) timer/counter 8-bit timer counter 2 channel or 16-bit event counter 1 channel 8-bit serial i/o 8 bits lsb first/msb first selectability lcd controller/ driver common output: 4 segment output: 32 (max.) *1 bias power supply pins: 4 lcd display ram size: 36 4 bits booster for lcd driving: built-in *1 dividing resistor for lcd driving: built-in (an external resistor selectability) no reference voltage generator and booster for lcd driving external interrupts (wake-up function) 4 (edge selectability) 8 (level interrupt only) buzzer output 1 (7 frequencies are selectable by the software.) mb89151/a part number parameter
3 mb89150/150a series (continued) *1: selected by the mask option. see section n mask options. *2: varies with conditions such as the operating frequency and the connected ice. (see section n electrical characteristics.) n package and corresponding products : available : not available note: for more information about each package, see section n package dimensions. mb89152/a mb89153/a mb89154/a mb89155/a mb89p155 mb89 pv150 remote control transmission output 1 (pulse width and cycle are software selectable.) standby modes sleep mode, stop mode, and watch mode process cmos operating voltage *2 2.2 v to 6.0 v (single clock)/2.2 v to 4.0 v (dual clock) 2.7 v to 6.0 v eprom for use mbm27c256a -20tv (lcc package) package mb89151/a mb89152/a mb89153/a mb89154/a mb89155/a mb89p155 mb89pv150 fpt-80p-m06 fpt-80p-m11 fpt-80p-m05 mqp-80c-p01 mb89151/a part number parameter
4 mb89150/150a series n differences among products 1. memory size before evaluating using the piggyback product, verify its differences from the product that will actually be used. take particular care on the following points: ? on the mb89151/a, addresses 0140 h and later of the register bank cannot be used. on the mb89152/a, 153/a, 154/a, 155/a, and mb89p155, addresses 0180 h and later of each register bank cannot be used. ? on the mb89p155, addresses bff0 h to bff6 h comprise the option setting area, option settings can be read by reading these addresses. ? the stack area, etc., is set at the upper limit of the ram. 2. current consumption ? in the case of the mb89pv150, add the current consumed by the eprom which is connected to the top socket. ? when operated at low speed, the product with an otprom (one-time prom) or an eprom will consume more current than the product with a mask rom. however, the current consumption in sleep/stop modes is the same. (for more information, see sections n electrical characteristics and n example characteristics.) 3. mask options functions that can be selected as options and how to designate these options vary by the product. before using options check section n mask options. take particular care on the following point: ? on the mb89pv150, options are fixed, except for the segment output selection.
5 mb89150/150a series n pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 p43/seg23* 4 p44/seg24* 4 p45/seg25* 4 p46/seg26* 4 p47/seg27* 4 p50/seg28* 4 p51/seg29* 4 p52/seg30* 4 p53/seg31* 4 p54/seg32* 4 p55/seg33* 4 p56/seg34* 4 v ss p57/seg35* 4 x1 x0 mod1 mod0 rst p00/int20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg2 seg1 seg0 com3 com2 com1 com0 v cc v3 v2 v1 v0 p32* 2 /c0* 1 p31* 2 /c1* 1 p30/rco x1a x0a p27/buz* 3 p26* 3 p25/sck 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 p42/seg22* 4 p41/seg21* 4 p40/seg20* 4 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 (top view) *1: for products with a booster circuit *2: for products without a booster circuit *3: n-ch open-drain high-current drive type *4: selected using the mask option (in units of 4 pins) (fpt-80p-m05) p01/int21 p02/int22 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 p12/int12 p13/int13 p14 p15 p16 p17 p20/ec p21* 3 p22/to p23/si p24/so
6 mb89150/150a series 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 p43/seg23* 4 p44/seg24* 4 p45/seg25* 4 p46/seg26* 4 p47/seg27* 4 p50/seg28* 4 p51/seg29* 4 p52/seg30* 4 p53/seg31* 4 p54/seg32* 4 p55/seg33* 4 p56/seg34* 4 v ss p57/seg35* 4 x1 x0 mod1 mod0 rst p00/int20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg2 seg1 seg0 com3 com2 com1 com0 v cc v3 v2 v1 v0 p32* 2 /c0* 1 p31* 2 /c* 1 p30/rco x1a x0a p27/buz* 3 p26* 3 p25/sck 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 p42/seg22* 4 p41/seg21* 4 p40/seg20* 4 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 (top view) *1: for products with a booster circuit *2: for products without a booster circuit *3: n-ch open-drain high-current drive type *4: selected using the mask option (in units of 4 pins) (fpt-80p-m11) p01/int21 p02/int22 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 p12/int12 p13/int13 p14 p15 p16 p17 p20/ec p21* 3 p22/to p23/si p24/so
7 mb89150/150a series 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 p41/seg21* 4 p42/seg22* 4 p43/seg23* 4 p44/seg24* 4 p45/seg25* 4 p46/seg26* 4 p47/seg27* 4 p50/seg28* 4 p51/seg29* 4 p52/seg30* 4 p53/seg31* 4 p54/seg32* 4 p55/seg33* 4 p56/seg34* 4 v ss p57/seg35* 4 x1 x0 mod1 mod0 rst p00/int20 p01/int21 p02/int22 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg4 seg3 seg2 seg1 seg0 com3 com2 com1 com0 v cc v3 v2 v1 v0 p32* 2 /c0* 1 p31* 2 /c1* 1 p30/rco x1a x0a p27/buz* 3 p26* 3 p25/sck p24/so p23/si 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 p40/seg20* 4 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 p12/int12 p13/int13 p14 p15 p16 p17 (top view) *1: for products with a booster circuit *2: for products without a booster circuit *3: n-ch open-drain high-current drive type *4: selected using the mask option (in units of 4 pins) (fpt-80p-m06) p20/ec p21* 3 p22/to
8 mb89150/150a series ? pin assignment on package top n.c.: internally connected. do not use. pin no. pin name pin no. pin name pin no. pin name pin no. pin name 81 n.c. 89 a2 97 n.c. 105 oe 82 v pp 90 a1 98 o4 106 n.c. 83 a12 91 a0 99 o5 107 a11 84 a7 92 n.c. 100 o6 108 a9 85 a6 93 o1 101 o7 109 a8 86 a5 94 o2 102 o8 110 a13 87 a4 95 o3 103 ce 111 a14 88 a3 96 v ss 104 a10 112 v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 p41/seg21* 2 p42/seg22* 2 p43/seg23* 2 p44/seg24* 2 p45/seg25* 2 p46/seg26* 2 p47/seg27* 2 p50/seg28* 2 p51/seg29* 2 p52/seg30* 2 p53/seg31* 2 p54/seg32* 2 p55/seg33* 2 p56/seg34* 2 v ss p57/seg35* 2 x1 x0 mod1 mod0 rst p00/int20 p01/int21 p02/int22 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg4 seg3 seg2 seg1 seg0 com3 com2 com1 com0 v cc v3 v2 v1 v0 p32 p31 p30/rco x1a x0a p27/buz* 1 p26* 1 p25/sck p24/so p23/si 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 p40/seg20* 2 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10/int10 p11/int11 p12/int12 p13/int13 p14 p15 p16 p17 (top view) 101 102 103 104 105 106 107 108 109 93 92 91 90 89 88 87 86 85 100 99 98 97 96 95 94 110 111 112 81 82 83 84 *1: n-ch open-drain high-current drive type *2: selected using the mask option (in units of 4 pins). (mqp-80c-p01) p20/ec p21* 1 p22/to
9 mb89150/150a series n pin description (continued) *1: fpt-80p-m11 *2: fpt-80p-m06 *3: fpt-80p-m05 *4: mqp-80c-p01 pin no. pin name circuit type function lqfp *1*3 mqfp *4 qfp *2 16 18 x0 a main clock oscillator pins 15 17 x1 18 20 mod0 c operating mode selection pins connect directly to v ss . 17 19 mod1 19 21 rst d reset i/o pin this pin is an n-ch open-drain output type with a pull- up resistor and a hysteresis input type. l is output from this pin by an internal reset source. the internal circuit is initialized by the input of l. 20 to 27 22 to 29 p00/int20 to p07/int27 e general-purpose i/o ports also serve as an external interrupt 2 input (wake-up function). external interrupt 2 input is hysteresis input. 28 to 31 30 to 33 p10/int10 to p13/int13 e general-purpose i/o ports also serve as external interrupt 1 input. external interrupt 1 input is hysteresis input. 32 to 35 34 to 37 p14 to p17 f general-purpose i/o ports 36 38 p20/ec h n-ch open-drain general-purpose i/o port also serves as the external clock input for the timer. the peripheral is a hysteresis input type. 37 39 p21 i n-ch open-drain general-purpose i/o port 38 40 p22/to i n-ch open-drain general-purpose i/o port also serves as a timer output. 39 41 p23/si h n-ch open-drain general-purpose i/o port also serves as the data input for the 8-bit serial i/o. the peripheral is a hysteresis input type. 40 42 p24/so i n-ch open-drain general-purpose i/o port also serves as the data output for the 8-bit serial i/o. 41 43 p25/sck h n-ch open-drain general-purpose i/o port also serves as the clock i/o for the 8-bit serial i/o. the peripheral is a hysteresis input type. 42 44 p26 i n-ch open-drain general-purpose i/o port 43 45 p27/buz i n-ch open-drain general-purpose i/o port also serves as a buzzer output.
10 mb89150/150a series (continued) *1: fpt-80p-m11 *2: fpt-80p-m06 *3: fpt-80p-m05 *4: mqp-80c-p01 pin no. pin name circuit type function lqfp *1*3 mqfp *4 qfp *2 48 50 p32 j functions as an n-ch open-drain general-purpose output port only in the products without a booster. c0 functions as a capacitor connection pin in the products with a booster. 47 49 p31 j functions as an n-ch open-drain general-purpose output port only in the products without a booster. c1 functions as a capacitor connection pin in the products with a booster. 46 48 p30/rco g general-purpose output-only port also serves as a remote control transmission output. 14 16 p57/seg35 j/k n-ch open-drain general-purpose output ports also serve as lcd controller/driver segment output. switching between port and common output is done by the mask option. 12 to 6 14 to 8 p56/seg34 to p50/seg28 5 to 1 7 to 3 p47/seg27 to p43/seg23 j/k 80, 79, 78 2, 1, 80 p42/seg22, p41/seg21, p40/seg20 77 to 58 79 to 60 seg19 to seg0 k lcd controller/driver segment output-only pins 57 to 54 59 to 56 com3 to com0 k lcd controller/driver common output-only pins 52 to 49 54 to 51 v3 to v0 lcd driving power supply pins 44 46 x0a b subclock crystal oscillator pins (32.768 khz) 45 47 x1a 53 55 v cc power supply pin 13 15 v ss power supply (gnd) pin
11 mb89150/150a series ? external eprom pins (mb89pv150 only) pin no. pin name i/o function 82 v pp o h level output pin 83 84 85 86 87 88 89 90 91 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins 93 94 95 o1 o2 o3 i data input pins 96 v ss o power supply (gnd) pin 98 99 100 101 102 o4 o5 o6 o7 o8 i data input pins 103 ce o rom chip enable pin outputs h during standby. 104 a10 o address output pin 105 oe o rom output enable pin outputs l at all times. 107 108 109 a11 a9 a8 o address output pins 110 a13 o 111 a14 o 112 v cc o eprom power supply pin 81 92 97 106 n.c. internally connected pins be sure to leave them open.
12 mb89150/150a series n i/o circuit type (continued) type circuit remarks a crystal or ceramic oscillation type (main clock) ? at an oscillation feedback resistor of approximately 1 m w /5.0 v cr oscillation type (main clock) (except mb89pv150/p155) b crystal oscillation type (subclock) ? at an oscillation feedback resistor of approximately 4.5 m w /3.0 v c d ? at output pull-up resistor (p-ch) of approximately 50 k w /5.0 v ? hysteresis input e ? cmos i/o ? the peripheral is a hysteresis input type. ? pull-up resistor optional (except mb89pv150) x1 x0 standby control signal x1 x0 standby control signal x1a x0a standby control signal r p-ch n-ch p-ch n-ch port peripheral p-ch r
13 mb89150/150a series (continued) type circuit remarks f ? cmos i/o ? pull-up resistor optional (except mb89pv150) g ? cmos output ? p-ch output is a high-current drive type. h ? n-ch open-drain i/o ? cmos input ? the peripheral is a hysteresis input type. ? pull-up resistor optional (except mb89pv150/p155) i ? n-ch open-drain i/o ? cmos input ? p21, p26, and p27 are a high-current drive type. ? pull-up resistor optional (except mb89pv150/p155) j ? n-ch open-drain output ? pull-up resistor optional (except mb89pv150/p155) ? p31 and p32 are not provided with a pull-up resistor. k ? lcd controller/driver segment output p-ch n-ch p-ch r p-ch n-ch n-ch port peripheral p-ch r n-ch p-ch r n-ch p-ch r p-ch n-ch p-ch n-ch
14 mb89150/150a series n handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on 1. absolute maximum ratings in section n electrical characteristics is applied between v cc and v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc and avr) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d and d/a converters connect to be av cc = davc = v cc and av ss = avr = v ss even if the a/d and d/a converters are not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore important. as stabilization guidelines, it is recommended to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode.
15 mb89150/150a series n programming to the eprom on the mb89p155 the mb89p155 is an otprom version of the mb89150/a series. 1. features ? 16-kbyte prom on chip ? options can be set using the eprom programmer. ? equivalency to the mbm27c256a in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in the eprom mode is diagrammed below. prom ffff h 0000 h 8000 h 0180 h not available normal operating mode i/o ram c000 h not available 7fff h 0000 h 4000 h program area (eprom) option area address eprom mode (corresponding addresses on the eprom programmer) vacancy (read value ff h ) vacancy (read value ff h ) 3ff0 h 3ff6 h 0080 h
16 mb89150/150a series 3. programming to the eprom in eprom mode, the mb89p155 functions equivalent to the mbm27c256a. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. ? programming procedure (1) set the eprom programmer to the mbm27c256a. (2) load program data into the eprom programmer at 4000 h to 7fff h (note that addresses c000 h to ffff h while operating as a normal operating mode assign to 4000 h to 7fff h in eprom mode). load option data into addresses 3ff0 h to 3ff5 h of the eprom programmer. (for information about each corresponding option, see 7. setting otprom options.) (3) program with the eprom programmer. 4. recommended screening conditions high-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked otprom microcomputer program. 5. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100% cannot be assured at all times. 6. eprom programmer socket adapter inquiry: sun hayato co., ltd.: tel 81-3-3802-5760 package compatible socket adapter fpt-80p-m05 rom-80sqf-28dp-8l fpt-80p-m06 rom-80qf-28dp-8l3 fpt-80p-m11 rom-80qf2-28dp-8l2 program, verify aging +150 c, 48 hrs. data verification assembly
17 mb89150/150a series 7. setting otprom options the programming procedure is the same as that for the prom. options can be set by programming values at the addresses shown on the memory map. the relationship between bits and options is shown on the following bit map: ? otprom option bit map notes: set each bit to 1 to erase. do not write 0 to the vacant bit. the read value of the vacant bit is 1, unless 0 is written to it. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3ff0 h vacancy readable vacancy readable oscillation stabilization time wtm1 wtm0 see section n mask options. vacancy readable reset pin output 1: yes 0: no clock mode selection 1: dual clock 0: single clock power-on reset 1: yes 0: no 3ff1 h p07 pull-up 1: no 0: yes p06 pull-up 1: no 0: yes p05 pull-up 1: no 0: yes p04 pull-up 1: no 0: yes p03 pull-up 1: no 0: yes p02 pull-up 1: no 0: yes p01 pull-up 1: no 0: yes p00 pull-up 1: no 0: yes 3ff2 h p17 pull-up 1: no 0: yes p16 pull-up 1: no 0: yes p15 pull-up 1: no 0: yes p14 pull-up 1: no 0: yes p13 pull-up 1: no 0: yes p12 pull-up 1: no 0: yes p11 pull-up 1: no 0: yes p10 pull-up 1: no 0: yes 3ff3 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable 3ff4 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable 3ff5 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable
18 mb89150/150a series n programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tv 2. programming socket adapter to program to the prom using an eprom programmer, use the socket adapter (manufacturer: sun hayato co., ltd.) listed below. inquiry: sun hayato co., ltd.: tel 81-3-3802-5760 3. memory space memory space in each mode is diagrammed below. 4. programming to the eprom (1) set the eprom programmer to the mbm27c256a. (2) load program data into the eprom programmer at 4000 h to 7fff h . (3) program to 0000 h to 7fff h with the eprom programmer. package adapter socket part number lcc-32(rectangle) rom-32lc-28dp-yg lcc-32(square) rom-32lc-28dp-s prom 32 kb ffff h 0000 h 8000 h 0080 h 0280 h normal operating mode i/o ram not available 7fff h 0000 h eprom 32 kb address corresponding addresses on the eprom programmer
19 mb89150/150a series n block diagram main clock oscillator clock controller subclock oscillator (32.768 khz) 21-bit time-base timer external interrupt 2 (wake-up function) cmos i/o port cmos i/o port f 2 mc-8l cpu ram (max. 256 8bits) mod0, mod1, v cc , v ss x0 x1 x0a x1a rst p00/int20 to p07/int27 rom (max. 16 k 8 bits) 8-bit serial i/o n-ch open-drain i/o port p21* 4 ,p26* 4 p27/buz* 4 p25/sck p24/so p23/si reset circuit (wdt) 8-bit timer/counter n-ch open-drain output port (only p30 is a cmos output type.) 4 16 4 4 20 4 4 8 p22/to p20/ec seg0 to seg19 v0 to v3 p54/seg32* 3 to p57/seg35* 3 p44/seg24* 3 to p47/seg27* 3 p40/seg20* 3 to p43/seg23* 3 p32/c0* 2 lcd controller/ driver external interrupt 1 (wake-up function) p10/int10 to p13/int13 4 4 buzzer output 8-bit timer/counter remote control output reference voltage generator and booster* 1 p50/seg28* 3 to p53/seg31* 3 4 com0 to com3 p31/c1* 2 p30/rco p14 to p17 2 n-ch open-drain output port port 0 *1: selected by mask option *2: used as ports without a reference voltage generator and booster *3: functions selected by mask option *4: n-ch open-drain high-current drive type 8 4 port 1 internal bus port 2 port 4 and port 5 port 3 36 4 bits vram other pins
20 mb89150/150a series n cpu core 1. memory space the microcontrollers of the mb89150/a series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is located at the lowest address. the data area is provided immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, that is, near the highest address. provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89150/a series is structured as illustrated below. memory space 0000 h 0080 h 0100 h 0200 h 0280 h 8000 h mb89pv150 i/o ram 512 b register not available external rom 32 kb 0000 h 0080 h 0100 h 0140 h f000 h ffff h mb89151/a i/o ram 128 b register rom 4 kb 0000 h 0080 h 0100 h 0180 h e800 h ffff h mb89152/a i/o ram 256 b register rom 6 kb 0000 h 0080 h 0100 h 0180 h e000 h ffff h mb89153/a i/o ram 256 b register rom 8 kb 0000 h 0080 h 0100 h 0180 h d000 h ffff h mb89154/a i/o ram 256 b register rom 12 kb ffff h 00c0 h 0000 h 0080 h 0100 h 0180 h c000 h ffff h mb89155/a mb89p155 i/o ram 256 b register rom 16 kb not available not available not available not available not available not available
21 mb89150/150a series 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following dedicated registers are provided: program counter (pc): a 16-bit register for indicating instruction storage positions accumulator (a): a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t): a 16-bit register which performs arithmetic operations with the accumulator when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix): a 16-bit register for index modification extra pointer (ep): a 16-bit pointer for indicating a memory address stack pointer (sp): a 16-bit register for indicating a stack area program status (ps): a 16-bit register for storing a register pointer, a condition code the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr). (see the diagram below.) pc a t ix ep sp ps 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h undefined undefined undefined undefined undefined i-flag = 0, il1, 0 = 11 other bits are undefined. initial value structure of the program status register vacancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr vacancy vacancy
22 mb89150/150a series the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag: set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared otherwise. this flag is for decimal adjustment instructions. i-flag: interrupt is allowed when this flag is set to 1. interrupt is prohibited when the flag is set to 0. set to 0 when reset. il1, 0: indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. n-flag: set if the msb is set to 1 as the result of an arithmetic operation. cleared when the bit is set to 0. z-flag: set when an arithmetic operation results in 0. cleared otherwise. v-flag: set if the complement on 2 overflows as a result of an arithmetic operation. reset if the overflow does not occur. c-flag: set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared otherwise. set to the shift-out value in the case of a shift instruction. il1 il0 interrupt level high-low 00 1 high low = no interrupt 01 10 2 11 3 rule for conversion of actual addresses of the general-purpose register area ? a15 ? a14 ? a13 ? a12 ? a11 ? a10 ? a9 ? a8 r4 a7 r3 a6 r2 a5 r1 a4 r0 a3 b2 a2 b1 a1 b0 a0 rp generated addresses lower op codes
23 mb89150/150a series the following general-purpose registers are provided: general-purpose registers: an 8-bit register for storing data the general-purpose registers are 8 bits and located in the register banks of the memory. one bank contains eight registers. up to a total of 8 banks can be used on the mb89151 (ram 128 8 bits), and a total of 16 banks can be used on the mb89152/3/4/5 (ram 256 8 bits). the bank currently in use is indicated by the register bank pointer (rp). note: the number of register banks that can be used varies with the ram size. register bank configuration r 1 r 2 r 3 r 4 r 5 r 6 r 7 this address = 0100 h + 8 (rp) memory area 8 banks (mb89151) 16 banks (mb89152/3/4/5) r 0
24 mb89150/150a series n i/o map (continued) address read/write register name register description 00 h (r/w) pdr0 port 0 data register 01 h (w) ddr0 port 0 data direction register 02 h (r/w) pdr1 port 1 data register 03 h (w) ddr1 port 1 data direction register 04 h (r/w) pdr2 port 2 data register 05 h (w) ddr2 port 2 data direction register 06 h vacancy 07 h (r/w) sycc system clock control register 08 h (r/w) stbc standby control register 09 h (r/w) wdtc watchdog timer control register 0a h (r/w) tbtc time-base timer control register 0b h (r/w) wpcr watch prescaler control register 0c h (r/w) pdr3 port 3 data register 0d h vacancy 0e h (r/w) pdr4 port 4 data register 0f h (r/w) pdr5 port 5 data register 10 h (r/w) bzcr buzzer register 11 h vacancy 12 h vacancy 13 h vacancy 14 h (r/w) rcr1 remote control transmission register 1 15 h (r/w) rcr2 remote control transmission register 2 16 h vacancy 17 h vacancy 18 h (r/w) t2cr timer 2 control register 19 h (r/w) t1cr timer 1 control register 1a h (r/w) t2dr timer 2 data register 1b h (r/w) t1dr timer 1 data register 1c h (r/w) smr1 serial mode register 1d h (r/w) sdr1 serial data register 1e h to 2f h vacancy
25 mb89150/150a series (continued) note: do not use vacancies. address read/write register name register description 30 h (r/w) eie1 external interrupt 1 enable register 31 h (r/w) eif1 external interrupt 1 flag register 32 h (r/w) eie2 external interrupt 2 enable register 33 h (r/w) eif2 external interrupt 2 flag register 34 h to 5f h vacancy 60 h to 71 h (r/w) vram display data ram 72 h (r/w) lcr1 lcd controller/driver control register 1 73 h to 7b h vacancy 7c h (w) ilr1 interrupt level setting register 1 7d h (w) ilr2 interrupt level setting register 2 7e h (w) ilr3 interrupt level setting register 3 7f h vacancy
26 mb89150/150a series n electrical characteristics 1. absolute maximum ratings ( v ss = 0.0 v) (continued) parameter symbol value unit remarks min. max. power supply voltage v cc v ss C 0.3 v ss + 7.0 v lcd power supply voltage v0 to v3 v ss C 0.3 v ss + 7.0 v v0 to v3 pins on the product with booster v ss C 0.3 v cc + 0.3 v v0 to v3 pins on the product without booster input voltage v i1 v ss C 0.3 v cc + 0.3 v v i1 must not exceed v ss +7.0 v. all pins except p20 to p27 without a pull-up resistor v i2 v ss C 0.3 v ss + 7.0 v p20 to p27 without a pull-up resistor output voltage v o1 v ss C 0.3 v cc + 0.3 v v o1 must not exceed v ss +7.0 v. all pins except p20 to p27, p31, p32, p40 to p47, p50 to p57 without a pull-up resistor v o2 v ss C 0.3 v ss + 7.0 v p20 to p27, p31, p32, p40 to p47, and p50 to p57, without a pull-up resistor l level maximum output current i ol1 10ma all pins except p21, p26, p27, and power supply pins i ol2 20 ma p21, p26, and p27 l level average output current i olav1 4ma average value (operating current operating rate) all pins except p21, p26, p27, and power supply pins. i olav2 8ma average value (operating current operating rate) p21, p26, and p27 l level total maximum output current ? i ol 80ma l level total average output current ? i olav 40ma average value (operating current operating rate) h level maximum output current i oh1 C5ma all pins except p30 and power supply pins i oh2 C10 ma p30
27 mb89150/150a series (continued) (v ss = 0.0 v) precautions: permanent device damage may occur if the above absolute maximum ratings are exceeded. func- tional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. recommended operating conditions ( v ss = 0.0 v) *1: the minimum operating power supply voltage varies with the execution time (instruction cycle time) setting for the operating frequency. *2: the lcd power supply voltage range and optimum value vary depending on the characteristics of the liquid- crystal display element. parameter symbol value unit remarks min. max. h level average output current i ohav1 C2ma average value (operating current operating rate) all pins except p30 and power supply pins. i ohav2 C4ma average value (operating current operating rate) p30 h level total output current ? i oh C20 ma h level total average output current ? i ohav C10 ma average value (operating current operating rate) power consumption p d 300 mw operating temperature t a C40 +85 c storage temperature tstg C55 +150 c parameter symbol value unit remarks min. max. power supply voltage v cc 2.2 *1 6.0 v normal operation assurance range single clock system of the mask rom product. 2.2 *1 4.0 v normal operation assurance range dual-clock system of the mask rom product. 2.7 *1 6.0 v mb89p155/pv150 1.5 6.0 v retains the ram state in stop mode lcd power supply voltage v0 to v3 v ss v cc *2 v v0 to v3 pins lcd reference power supply input voltage v ir 1.3 2.2 v v1 pin on the products with a booster reference power external input operating temperature t a C40 +85 c
28 mb89150/150a series figure 1 operating voltage vs. main clock operating frequency (mb89p155/pv150, and single-clock mb89151/a, 152/a, 153/a, 154/a, and mb89155/a) figure 2 operating voltage vs. main clock operating frequency (dual-clock mb89151/a, 152/a, 153/a, 154/a, and mb89155/a) figures 1 and 2 indicate the operating frequency of the external oscillator at a minimum execution time of 4/f ch . since the operating voltage range is dependent on the minimum execution time, see the minimum execution time if the operating speed is switched using a gear. 1 2 3 4 5 6 1 2 3 4 5 operation assurance range operating voltage (v) note: the shaded area is assured only for the mb89151/a, 152/a, 153/a, 154/a, and mb89155/a. 4.0 2.0 1.0 0.8 main clock operating frequency (at an instruction cycle of 4/fc) (mhz) minimum execution time (instruction cycle) ( m s) 1 2 3 4 5 6 1 2 3 4 5 operation assurance range operating voltage (v) 4.0 2.0 1.0 0.8 main clock operating frequency (at an instruction cycle of 4/fc) (mhz) minimum execution time (instruction cycle) ( m s)
29 mb89150/150a series 3. dc characteristics (v cc = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min. typ. max. h level input voltage v ih p00 to p07, p10 to p17, p20 to p27 0.7 v cc ? v cc + 0.3 v cmos input v ihs rst , mod0, mod1, ec, si, sck, int10 to int13, int20 to int27 0.8 v cc ? v ss + 0.3 v hysteresis input l level input voltage v il p00 to p07, p10 to p17, p20 to p27 v ss - 0.3 ? 0.3 v cc v cmos input v ils rst , mod0, mod1, ec, si, sck, int10 to int13, int20 to int27 v ss - 0.3 ? 0.2 v cc v hysteresis input open-drain output pin application voltage v d p20 to p27, p31, p32, p40 to p47, p50 to p57 v ss - 0.3 ? v ss + 6.0 *1 v without pull-up resistor h level output voltage v oh1 p00 to p07, p10 to p17 i oh = C2.0 ma 2.4 ?? v v oh2 p30 i oh = C6.0 ma 4.0 v l level output voltage v ol1 p00 to p07, p10 to p17, p20, p22 to p25, p30 to p32, p40 to p47, p50 to p57 i ol = 1.8 ma ? 0.4 v v ol2 p21, p26, p27 i ol = 8.0 ma 0.4 v v ol3 rst i ol = 4.0 ma 0.4 v input leakage current (hi-z output leakage current) i li1 mod0, mod1, p30, p00 to p07, p10 to p17 0.0 v < v i < v cc ? 5 m a without pull-up resistor i li2 p20 to p27, p31, p32, p40 to p47, p50 to p57 0.0 v < v i < 6.0 v 1 m a without pull-up resistor pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p40 to p47, p50 to p57, rst v i = 0.0 v 25 50 100 k w with pull-up resistor common output impedance r vcom com0 to com3 v1 to v3 = 5.0 v 2.5k w segment output impedance r vseg seg0 to seg35 v1 to v3 = 5.0 v 15 k w lcd divided resistance r lcd between v cc and v0 300 500 750 k w products without a booster only lcd leakage current i lcdl v0 to v3, com0 to com3, seg0 to seg35 1 m a
30 mb89150/150a series (v cc = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min. typ. max. booster for lcd driving output voltage v ov3 v3 v1 = 1.5 v 4.3 4.5 4.7 v products with a booster only v ov2 v2 2.9 3.0 3.1 v reference output voltage for lcd driving v ov1 v1 i in = 0 m a 1.3 1.5 1.7 v power supply current *2 i cc1 v cc f ch = 4.2 mhz, v cc = 5.0 v t inst *3 = 0.95 m s main clock operation 3.0 4.5 ma mb89151/a, 152/a, 153/a, 154/a, 155/a, mb89pv150- 101 to 105 3.8 6.0 ma mb89p155-101 to 105/201 to 205 i cc2 f ch = 4.2 mhz, v cc = 3.0 v t inst *3 = 15.2 m s main clock operation 0.25 0.4 ma mb89151/a, 152/a,153/a, 154/a, 155/a, mb89pv150- 101 to 105 0.85 1.4 ma mb89p155-101 to 105/201 to 205 i ccl f cl = 32.768 khz, v cc = 3.0 v t inst *3 = 61 m s subclock operation 0.05 0.1 ma mb89151/a, 152/a, 153/a, 154/a, 155/a, mb89pv150- 101 to 105 0.65 1.1 ma mb89p155-101 to 105/201 to 205 i ccs1 f ch = 4.2 mhz, v cc = 5.0 v t inst *3 = 0.95 m s main clock sleep mode 0.8 1.2 ma i ccs2 f ch = 4.2 mhz, v cc = 3.0 v t inst *3 = 15.2 m s main clock sleep mode 0.2 0.3 ma i ccsl f cl = 32.768 khz, v cc = 3.0 v t inst *3 = 61 m s subclock sleep mode 2550 m a
31 mb89150/150a series (continued) (v cc = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) *1: p31 and p32 are applicable only for products of the mb89150 series (without the a suffix). p40 to p47 and p50 to p57 are applicable when selected as ports. *2: the power supply current is measured at the external clock, open output pins, and the external lcd dividing resistor (or external input for the reference voltage). in the case of the mb89pv150, the current consumed by the connected eprom and ice is not included. *3: for information on t inst , see (4) instruction cycle in 4. ac characteristics. note: for pins which serves as the segment (seg20 to seg35) and ports (p40 to p47, p50 to p57), see the port parameter when these pins are used as ports and the segment parameter when they are used as segments. p31 and p32 are applicable only for products without a booster (applicable as external capacitor connection pins for products with a booster). parameter symbol pin condition value unit remarks min. typ. max. power supply current *2 i cct v cc f cl = 32.768 khz, v cc = 3.0 v watch mode 1015 m a mb89151/2/3/4/5, mb89p155-101 to 105, mb89pv150-101 to 105 i cct2 f cl = 32.768 khz, v cc = 3.0 v ? watch mode ?during reference voltage generator and booster operation 250 400 m a mb89151a/2a/ 3a/4a/5a, mb89p155-201 to 205 i cch t a = +25 c, v cc = 5.0 v stop mode 0.1 1 m a mb89151/2/3/4/5 0.110 m a mb89pv150-101 to 105, mb89p155-101 to 105 input capacitance c in other than v cc , v ss f = 1 mhz 10 ? pf
32 mb89150/150a series 4. ac characteristics (1) reset timing (v ss = 0.0 v, t a = C40 c to +85 c) (2) power-on reset (v ss = 0.0 v, t a = C40 c to +85 c) note: make sure that power supply rises within the selected oscillation stabilization time. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min. max. rst l pulse width t zlzh 48 t hcyl ns parameter symbol condition value unit remarks min. max. power supply rising time t r 50 ms power-on reset function only power supply cut-off time t off 1 ms due to repeated operations 0.2 v cc rst t zlzh 0.2 v 0.2 v 2.0 v 0.2 v t r v cc t off
33 mb89150/150a series (3) clock timing (v ss = 0.0 v, t a = C40 c to +85 c) parameter symbol pin value unit remarks min. typ. max. clock frequency f ch x0, x1 1 4.2 mhz main clock f cl x0a, x1a 32.768 khz subclock clock cycle time t hcyl x0, x1 238 1000 ns main clock t lcyl x0a, x1a 30.5 m s subclock input clock pulse width p wh p wl x0 20 ns external clock p whl p wll x0a 15.2 m s input clock pulse rising/falling time t cr t cf x0, x0a 10 ns 0.8 v cc x0 x1 c 1 c 2 f ch open when a crystal or ceramic resonator is used when an external clock is used when the cr oscillation option is used t hcyl 0.2 v cc p wh p wl t cf t cr x0 x0 x1 c f ch r x0 x1 f ch x0 and x1 timing and conditions main clock conditions
34 mb89150/150a series (4) instruction cycle parameter symbol value unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch m s (4/f ch ) t inst = 0.95 m s when operating at f ch = 4.2 mhz 2/f cl m s t inst = 61.036 m s when operating at f cl = 32.768 khz 0.8 v cc x0a x1a c 1 c 2 f cl open when a crystal or ceramic resonator is used when an external clock is used when the single clock option is used t lcyl 0.2 v cc p whl p wll t cf t cr x0a x0a x1a r x0a x1a f cl open x0a and x1a timing and conditions subclock conditions
35 mb89150/150a series (5) serial i/o timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin condition value unit remarks min. max. serial clock cycle time t scyc sck internal shift clock mode 2 t inst * m s sck ? so time t slov sck, so C200 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s serial clock h pulse width t shsl sck external shift clock mode 1 t inst * m s serial clock l pulse width t slsh sck 1 t inst * m s sck ? so time t slov sck, so 0 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s t scyc t slov t slov t shix t ivsh sck 2.4 v 0.8 v 0.8 v 2.4 v 0.8 v 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc so si t slsh t shix t ivsh sck 0.8 v cc 0.2 v cc 2.4 v 0.8 v 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc so si 0.2 v cc t shsl 0.8 v cc internal shift clock mode external shift clock mode
36 mb89150/150a series (6) peripheral input timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst, see (4) instruction cycle. parameter symbol pin value unit remarks min. max. peripheral input h pulse width 1 t ilih1 int10 to int13, ec 1 t inst * m s peripheral input l pulse width 1 t ihil1 1 t inst * m s peripheral input h pulse width 2 t ilih2 int20 to int27 2 t inst * m s peripheral input l pulse width 2 t ihil2 2 t inst * m s int10 to 13, ec int20 to 27 t ihil1 0.2 v cc 0.8 v cc 0.2 v cc t ilih1 0.8 v cc t ihil2 0.2 v cc 0.8 v cc 0.2 v cc t ilih2 0.8 v cc
37 mb89150/150a series n example characteristics (continued) (1) l level output voltage (2) h level output voltage 0 0.6 0.5 0.4 0.3 0.2 0.1 0 v ol1 (v) i ol (ma) 246810 v cc = 2.0 v v cc = 3.0 v 13579 v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v v cc = 2.5 v t a = +25 c v ol1 vs. i ol 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 4 8 12 16 20 v cc = 2.0 v v ol2 (v) i ol ( ma ) v cc = 2.5 v v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v 2 6 10 14 18 t a = +25 c v ol2 vs. i ol 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ? ? ? ? ? v cc = 2.0 v v cc ?v oh1 (v) i oh (ma) v cc = 2.5 v v cc = 4.0 v v cc = 3.0 v v cc = 5.0 v v cc = 6.0 v t a = +25 c v cc ?v oh1 vs. i oh 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ? ? ? ? ?0 v cc = 2.0 v v cc ?v oh2 (v) i oh (ma) v cc = 2.5 v v cc = 4.0 v v cc = 3.0 v v cc = 5.0 v v cc = 6.0 v ? ? ? ? ? t a = +25 c v cc v oh2 vs. i oh
38 mb89150/150a series (continued) i cc2 (ma) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 v cc (v) i cc2 vs. v cc (mask rom product) f ch = 3 mhz f ch = 4.2 mhz f ch = 1 mhz t a = +25 c 1234567 i cc1 (ma) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1234567 v cc (v) i cc1 vs. v cc (mask rom product) f ch = 3 mhz f ch = 4.2 mhz f ch = 1 mhz t a = +25 c 1234567 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v cc (v) v in (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v ihs v ils v cc (v) v in (v) t a = +25 c t a = +25 c v in vs. v cc v in vs. v cc 1234567 (3) h level input voltage/l level input voltage (4) power supply current (external clock) v ihs : threshold when input voltage in hysteresis v ils : threshold when input voltage in hysteresis characteristics is set to h level characteristics is set to l level (cmos input) (hysteresis input)
39 mb89150/150a series (continued) 1.2 0 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 i ccs1 (ma) i ccs1 vs. v cc t a = +25 c f ch = 4.2 mhz f ch = 3 mhz f ch = 1 mhz v cc (v) 1234567 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 i ccs2 (ma) i ccs2 vs. v cc f ch = 4.2 mhz f ch = 3 mhz f ch = 1 mhz t a = +25 c v cc (v) 1234567 200 180 160 140 120 100 80 60 40 20 0 i ccl ( m a) i ccl vs. v cc (mask rom product) f cl = 32.768 khz t a = +25 c 1234567 v cc (v) 30 0 25 20 15 10 5 i cct ( m a) i cct vs. v cc f cl = 32.768 khz t a = +25 c 1234567 v cc (v)
40 mb89150/150a series (continued) (5) pull-up resistance 200 180 160 140 120 100 80 60 40 20 0 i ccsl ( m a) i ccsl vs. v cc f cl = 32.768 khz t a = +25 c 1234567 v cc (v) 1,000 900 800 700 600 500 400 300 200 100 0 i cct2 ( m a) i cct2 vs. v cc f cl = 32.768 khz t a = +25 c 1234567 v cc (v) 1234567 1,000 r pull (k w ) v cc (v) 10 50 500 100 t a = +25 c t a = +85 c t a = ?0 c
41 mb89150/150a series n instructions execution instructions can be divided into the following four groups: ? transfer ? arithmetic operation ? branch ? others table 1 lists symbols used for notation of instructions. table 1 instruction symbols (continued) symbol meaning dir direct address (8 bits) off offset (8 bits) ext extended address (16 bits) #vct vector table number (3 bits) #d8 immediate data (8 bits) #d16 immediate data (16 bits) dir: b bit direct address (8:3 bits) rel branch relative address (8 bits) @ register indirect (example: @a, @ix, @ep) a accumulator a (whether its length is 8 or 16 bits is determined by the instruction in use.) ah upper 8 bits of accumulator a (8 bits) al lower 8 bits of accumulator a (8 bits) t temporary accumulator t (whether its length is 8 or 16 bits is determined by the instruction in use.) th upper 8 bits of temporary accumulator t (8 bits) tl lower 8 bits of temporary accumulator t (8 bits) ix index register ix (16 bits)
42 mb89150/150a series (continued) columns indicate the following: mnemonic: assembler notation of an instruction ~: number of instructions #: number of bytes operation: operation of an instruction tl, th, ah: a content change when each of the tl, th, and ah instructions is executed. symbols in the column indicate the following: ? C indicates no change. ? dh is the 8 upper bits of operation description data. ? al and ah must become the contents of al and ah immediately before the instruction is executed. ? 00 becomes 00. n, z, v, c: an instruction of which the corresponding flag will change. if + is written in this column, the relevant instruction will change its corresponding flag. op code: code of an instruction. if an instruction is more than one code, it is written according to the following rule: example: 48 to 4f ? this indicates 48, 49, ... 4f. symbol meaning ep extra pointer ep (16 bits) pc program counter pc (16 bits) sp stack pointer sp (16 bits) ps program status ps (16 bits) dr accumulator a or index register ix (16 bits) ccr condition code register ccr (8 bits) rp register bank pointer rp (5 bits) ri general-purpose register ri (8 bits, i = 0 to 7) indicates that the very is the immediate data. (whether its length is 8 or 16 bits is determined by the instruction in use.) ( ) indicates that the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.) (( )) the address indicated by the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.)
43 mb89150/150a series table 2 transfer instructions (48 instructions) notes: during byte transfer to a, t ? a is restricted to low bytes. operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (reverse arrangement of f 2 mc-8 family) mnemonic ~ # operation tl th ah n z v c op code mov dir,a mov @ix +off,a mov ext,a mov @ep,a mov ri,a mov a,#d8 mov a,dir mov a,@ix +off mov a,ext mov a,@a mov a,@ep mov a,ri mov dir,#d8 mov @ix +off,#d8 mov @ep,#d8 mov ri,#d8 movw dir,a movw @ix +off,a movw ext,a movw @ep,a movw ep,a movw a,#d16 movw a,dir movw a,@ix +off movw a,ext movw a,@a movw a,@ep movw a,ep movw ep,#d16 movw ix,a movw a,ix movw sp,a movw a,sp mov @a,t movw @a,t movw ix,#d16 movw a,ps movw ps,a movw sp,#d16 swap setb dir: b clrb dir: b xch a,t xchw a,t xchw a,ep xchw a,ix xchw a,sp movw a,pc 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 (dir) ? (a) ( (ix) +off ) ? (a) (ext) ? (a) ( (ep) ) ? (a) (ri) ? (a) (a) ? d8 (a) ? (dir) (a) ? ( (ix) +off) (a) ? (ext) (a) ? ( (a) ) (a) ? ( (ep) ) (a) ? (ri) (dir) ? d8 ( (ix) +off ) ? d8 ( (ep) ) ? d8 (ri) ? d8 (dir) ? (ah),(dir + 1) ? (al) ( (ix) +off) ? (ah), ( (ix) +off + 1) ? (al) (ext) ? (ah), (ext + 1) ? (al) ( (ep) ) ? (ah),( (ep) + 1) ? (al) (ep) ? (a) (a) ? d16 (ah) ? (dir), (al) ? (dir + 1) (ah) ? ( (ix) +off), (al) ? ( (ix) +off + 1) (ah) ? (ext), (al) ? (ext + 1) (ah) ? ( (a) ), (al) ? ( (a) ) + 1) (ah) ? ( (ep) ), (al) ? ( (ep) + 1) (a) ? (ep) (ep) ? d16 (ix) ? (a) (a) ? (ix) (sp) ? (a) (a) ? (sp) ( (a) ) ? (t) ( (a) ) ? (th),( (a) + 1) ? (tl) (ix) ? d16 (a) ? (ps) (ps) ? (a) (sp) ? d16 (ah) ? (al) (dir): b ? 1 (dir): b ? 0 (al) ? (tl) (a) ? (t) (a) ? (ep) (a) ? (ix) (a) ? (sp) (a) ? (pc) C C C C C al al al al al al al C C C C C C C C C al al al al al al C C C C C C C C C C C C C C C al al C C C C C C C C C C C C C C C C C C C C C C C C C ah ah ah ah ah ah C C C C C C C C C C C C C C C C ah C C C C C C C C C C C C C C C C C C C C C C C C C dh dh dh dh dh dh dh C C dh C dh C C C dh C C al C C C dh dh dh dh dh C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 45 46 61 47 48 to 4f 04 05 06 60 92 07 08 to 0f 85 86 87 88 to 8f d5 d6 d4 d7 e3 e4 c5 c6 c4 93 c7 f3 e7 e2 f2 e1 f1 82 83 e6 70 71 e5 10 a8 to af a0 to a7 42 43 f7 f6 f5 f0
44 mb89150/150a series table 3 arithmetic operation instructions (62 instructions) (continued) mnemonic ~ # operation tl th ah n z v c op code addc a,ri addc a,#d8 addc a,dir addc a,@ix +off addc a,@ep addcw a addc a subc a,ri subc a,#d8 subc a,dir subc a,@ix +off subc a,@ep subcw a subc a inc ri incw ep incw ix incw a dec ri decw ep decw ix decw a mulu a divu a andw a orw a xorw a cmp a cmpw a rorc a rolc a cmp a,#d8 cmp a,dir cmp a,@ep cmp a,@ix +off cmp a,ri daa das xor a xor a,#d8 xor a,dir xor a,@ep xor a,@ix +off xor a,ri and a and a,#d8 and a,dir 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 (a) ? (a) + (ri) + c (a) ? (a) + d8 + c (a) ? (a) + (dir) + c (a) ? (a) + ( (ix) +off) + c (a) ? (a) + ( (ep) ) + c (a) ? (a) + (t) + c (al) ? (al) + (tl) + c (a) ? (a) - (ri) - c (a) ? (a) - d8 - c (a) ? (a) - (dir) - c (a) ? (a) - ( (ix) +off) - c (a) ? (a) - ( (ep) ) - c (a) ? (t) - (a) - c (al) ? (tl) - (al) - c (ri) ? (ri) + 1 (ep) ? (ep) + 1 (ix) ? (ix) + 1 (a) ? (a) + 1 (ri) ? (ri) - 1 (ep) ? (ep) - 1 (ix) ? (ix) - 1 (a) ? (a) - 1 (a) ? (al) (tl) (a) ? (t) / (al),mod ? (t) (a) ? (a) (t) (a) ? (a) (t) (a) ? (a) " (t) (tl) - (al) (t) - (a) (a) - d8 (a) - (dir) (a) - ( (ep) ) (a) - ( (ix) +off) (a) - (ri) decimal adjust for addition decimal adjust for subtraction (a) ? (al) " (tl) (a) ? (al) " d8 (a) ? (al) " (dir) (a) ? (al) " ( (ep) ) (a) ? (al) " ( (ix) +off) (a) ? (al) " (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) C C C C C C C C C C C C C C C C C C C C C C C dl C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 00 C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C dh C C C C dh C C C dh dh 00 dh dh dh C C C C C C C C C C C C C C C C C C C C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + C C C C C C C C C + + C C + + + C C C C C C C C C + + C C C C C C C C C C + + r C + + r C + + r C + + + + + + + + + + C + + + C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C 28 to 2f 24 25 26 27 23 22 38 to 3f 34 35 36 37 33 32 c8 to cf c3 c2 c0 d8 to df d3 d2 d0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1f 84 94 52 54 55 57 56 58 to 5f 62 64 65 a c ? ? ?? a c
45 mb89150/150a series (continued) table 4 branch instructions (17 instructions) table 5 other instructions (9 instructions) mnemonic ~ # operation tl th ah n z v c op code and a,@ep and a,@ix +off and a,ri or a or a,#d8 or a,dir or a,@ep or a,@ix +off or a,ri cmp dir,#d8 cmp @ep,#d8 cmp @ix +off,#d8 cmp ri,#d8 incw sp decw sp 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (dir) C d8 ( (ep) ) C d8 ( (ix) + off) C d8 (ri) C d8 (sp) ? (sp) + 1 (sp) ? (sp) C 1 C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + + + + + + + + + + + + + + + C C C C C C C C 67 66 68 to 6f 72 74 75 77 76 78 to 7f 95 97 96 98 to 9f c1 d1 mnemonic ~ # operation tl th ah n z v c op code bz/beq rel bnz/bne rel bc/blo rel bnc/bhs rel bn rel bp rel blt rel bge rel bbc dir: b,rel bbs dir: b,rel jmp @a jmp ext callv #vct call ext xchw a,pc ret reti 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 if z = 1 then pc ? pc + rel if z = 0 then pc ? pc + rel if c = 1 then pc ? pc + rel if c = 0 then pc ? pc + rel if n = 1 then pc ? pc + rel if n = 0 then pc ? pc + rel if v " n = 1 then pc ? pc + rel if v " n = 0 then pc ? pc + rei if (dir: b) = 0 then pc ? pc + rel if (dir: b) = 1 then pc ? pc + rel (pc) ? (a) (pc) ? ext vector call subroutine call (pc) ? (a),(a) ? (pc) + 1 return from subrountine return form interrupt C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + C C C + C C C C C C C C C C C C C C C C C C C C C C C C C C restore fd fc f9 f8 fb fa ff fe b0 to b7 b8 to bf e0 21 e8 to ef 31 f4 20 30 mnemonic ~ # operation tl th ah n z v c op code pushw a popw a pushw ix popw ix nop clrc setc clri seti 4 4 4 4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C r C C C s C C C C C C C C 40 50 41 51 00 81 91 80 90
46 mb89150/150a series n instruction map 0123456789abcdef 0 nop swap ret reti pushw a popw a mov a,ext movw a,ps clri seti clrb dir: 0 bbc dir: 0,rel incw a decw a jmp @a movw a,pc 1 mulu a divu a jmp addr16 call addr16 pushw ix popw ix mov ext,a movw ps,a clrc setc clrb dir: 1 bbc dir: 1,rel incw sp decw sp movw sp,a movw a,sp 2 rolc a cmp a addc a subc a xch a, t xor a and a or a mov @a,t mov a,@a clrb dir: 2 bbc dir: 2,rel incw ix decw ix movw ix,a movw a,ix 3 rorc a cmpw a addcw a subcw a xchw a, t xorw a andw a orw a movw @a,t movw a,@a clrb dir: 3 bbc dir: 3,rel incw ep decw ep movw ep,a movw a,ep 4 mov a,#d8 cmp a,#d8 addc a,#d8 subc a,#d8 xor a,#d8 and a,#d8 or a,#d8 daa das clrb dir: 4 bbc dir: 4,rel movw a,ext movw ext,a movw a,#d16 xchw a,pc 5 mov a,dir cmp a,dir addc a,dir subc a,dir mov dir,a xor a,dir and a,dir or a,dir mov dir,#d8 cmp dir,#d8 clrb dir: 5 bbc dir: 5,rel movw a,dir movw dir,a movw sp,#d16 xchw a,sp 6 mov a,@ix +d cmp a,@ix +d addc a,@ix +d subc a,@ix +d mov @ix +d,a xor a@,ix +d and a,@ix +d or a,@ix +d mov @ix +d,#d8 cmp @ix +d,#d8 clrb dir: 6 bbc dir: 6,rel movw a,@ix +d movw @ix +d,a movw ix,#d16 xchw a,ix 7 mov a,@ep cmp a,@ep addc a,@ep subc a,@ep mov @ep,a xor a,@ep and a,@ep or a,@ep mov @ep,#d8 cmp @ep,#d8 clrb dir: 7 bbc dir: 7,rel movw a,@ep movw @ep,a movw ep,#d16 xchw a,ep 8 mov a,r0 cmp a,r0 addc a,r0 subc a,r0 mov r0,a xor a,r0 and a,r0 or a,r0 mov r0,#d8 cmp r0,#d8 setb dir: 0 bbs dir: 0,rel inc r0 dec r0 callv #0 bnc rel 9 mov a,r1 cmp a,r1 addc a,r1 subc a,r1 mov r1,a xor a,r1 and a,r1 or a,r1 mov r1,#d8 cmp r1,#d8 setb dir: 1 bbs dir: 1,rel inc r1 dec r1 callv #1 bc rel a mov a,r2 cmp a,r2 addc a,r2 subc a,r2 mov r2,a xor a,r2 and a,r2 or a,r2 mov r2,#d8 cmp r2,#d8 setb dir: 2 bbs dir: 2,rel inc r2 dec r2 callv #2 bp rel b mov a,r3 cmp a,r3 addc a,r3 subc a,r3 mov r3,a xor a,r3 and a,r3 or a,r3 mov r3,#d8 cmp r3,#d8 setb dir: 3 bbs dir: 3,rel inc r3 dec r3 callv #3 bn rel c mov a,r4 cmp a,r4 addc a,r4 subc a,r4 mov r4,a xor a,r4 and a,r4 or a,r4 mov r4,#d8 cmp r4,#d8 setb dir: 4 bbs dir: 4,rel inc r4 dec r4 callv #4 bnz rel d mov a,r5 cmp a,r5 addc a,r5 subc a,r5 mov r5,a xor a,r5 and a,r5 or a,r5 mov r5,#d8 cmp r5,#d8 setb dir: 5 bbs dir: 5,rel inc r5 dec r5 callv #5 bz rel e mov a,r6 cmp a,r6 addc a,r6 subc a,r6 mov r6,a xor a,r6 and a,r6 or a,r6 mov r6,#d8 cmp r6,#d8 setb dir: 6 bbs dir: 6,rel inc r6 dec r6 callv #6 bge rel f mov a,r7 cmp a,r7 addc a,r7 subc a,r7 mov r7,a xor a,r7 and a,r7 or a,r7 mov r7,#d8 cmp r7,#d8 setb dir: 7 bbs dir: 7,rel inc r7 dec r7 callv #7 blt rel l h
47 mb89150/150a series n mask options no. part number mb89151/1a, 2/2a, 3/3a, 4/4a, 5/5a mb89p155 mb89pv150 specifying procedure specify when ordering masking set with eprom programmer setting not possible 1 pull-up resistors p00 to p07, p10 to p17 selectable per pin can be set per pin fixed to without a pull-up resistor 2 pull-up resistors p40 to p47, p50 to p57 selectable per pin (only when segment output is not selected.) fixed to without a pull-up resistor 3 pull-up resistors p20 to p27 selectable by pin fixed to without a pull-up resistor 4 power-on reset with power-on reset without power-on reset selectable selectable fixed to with power-on reset 5 selection of oscillation stabilization time ? the initial value of the oscillation stabilization time for the main clock can be set by selecting the values of the wtm1 and wtm0 bits on the right. selectable wtm1 wtm0 00:2 2 /f ch 01:2 12 /f ch 10:2 16 /f ch 11:2 18 /f ch selectable wtm1wtm0 00:2 2 /f ch 01:2 12 /f ch 10:2 16 /f ch 11:2 18 /f ch fixed to oscillation stabilization time of 2 16 /f ch 6 main clock oscillation type crystal or ceramic resonator cr selectable fixed to crystal or ceramic only fixed to crystal or ceramic 7 reset pin output with reset output without reset output selectable selectable fixed to with reset output 8 clock mode selection dual-clock mode single-clock mode selectable selectable fixed to dual-clock mode 9 segment output selection 36: no ports selection 32: selection of p57 to p54 28: selection of p57 to p50 24: selection of p57 to p50, and p47 to p44. 20: selection of p57 to p50, and p47 to p40. selectable selection of the number of segments. -101/201: 36 segments -102/202: 32 segments -103/203: 28 segments -104/204: 24 segments -105/205: 20 segments -101: 36 segments -102: 32 segments -103: 28 segments -104: 24 segments -105: 20 segments 10 selection of a built-in booster without booster: mb89151/2/3/4/5 with booster: mb89151a/2a/3a/4a/5a without booster: -101 to 105 with booster: -201 to 205 fixed to without booster (-100 to 105 only)
48 mb89150/150a series ? versions n ordering information (continued) version features mass production product one-time prom product piggyback/evaluation product number of segment pins booster mb8915151a 152a 153a 154a 155a mb89p155-201 -202 -203 -204 -205 36 32 28 24 20 yes mb8915151 152 153 154 155 mb89p155-101 -102 -103 -104 -105 mb89pv150-101 -102 -103 -104 -105 36 32 28 24 20 no part number package remarks mb89151pf mb89152pf mb89153pf mb89154pf mb89155pf mb89p155pf-101 mb89p155pf-102 mb89p155pf-103 mb89p155pf-104 mb89p155pf-105 80-pin plastic qfp (fpt-80p-m06) without booster mb89151apf mb89152apf mb89153apf mb89154apf mb89155apf mb89p155pf-201 mb89p155pf-202 mb89p155pf-203 mb89p155pf-204 mb89p155pf-205 with booster
49 mb89150/150a series (continued) part number package remarks mb89151pfm mb89152pfm mb89153pfm mb89154pfm mb89155pfm mb89p155pfm-101 mb89p155pfm-102 mb89p155pfm-103 mb89p155pfm-104 mb89p155pfm-105 80-pin plastic lqfp (fpt-80p-m11) without booster mb89151apfm mb89152apfm mb89153apfm mb89154apfm mb89155apfm mb89p155pfm-201 mb89p155pfm-202 mb89p155pfm-203 mb89p155pfm-204 mb89p155pfm-205 with booster mb89151pfv mb89152pfv mb89153pfv mb89154pfv mb89155pfv mb89p155pfv-101 mb89p155pfv-102 mb89p155pfv-103 mb89p155pfv-104 mb89p155pfv-105 80-pin plastic lqfp (fpt-80p-m05) without booster mb89151apfv mb89152apfv mb89153apfv mb89154apfv mb89155apfv mb89p155pfv-201 mb89p155pfv-202 mb89p155pfv-203 mb89p155pfv-204 mb89p155pfv-205 with booster MB89PV150CF-101 mb89pv150cf-102 mb89pv150cf-103 mb89pv150cf-104 mb89pv150cf-105 80-pin ceramic mqfp (mqp-80c-p01) without booster
50 mb89150/150a series c 1995 fujitsu limited f80016s-1c-3 0.13(.005) m 0.10(.004) 1 pin index .059 ?.004 +.008 ?0.10 +0.20 1.50 "a" details of "a" part 0 10? 0.500.20 0.100.10 (.004.004) (.020.008) (stand off) 16.000.20(.630.008)sq 14.000.10(.551.004)sq 0.65(.0256)typ 0.300.10 (.012.004) 0.127 +0.05 ?0.02 +.002 ?.001 .005 12.35 15.00 (.486) ref (.591) nom 20 21 40 1 80 61 41 60 lead no. n package dimensions "a" lead no. (.031.008) 0.800.20 0.30(.012) 0.25(.010) 80 65 64 41 40 25 24 1 22.300.40(.878.016) 18.40(.724)ref m 0.16(.006) (.014.004) 0.350.10 0.80(.0315)typ (.705.016) (.551.008) 14.000.20 17.900.40 20.000.20(.787.008) 23.900.40(.941.016) index 0.150.05(.006.002) (stand off) 0.05(.002)min 3.35(.132)max (.642.016) 16.300.40 ref 12.00(.472) details of "b" part 0 10 details of "a" part 0.18(.007)max 0.58(.023)max 0.10(.004) "b" 1994 fujitsu limited f80010s-3c-2 c dimensions in mm (inches) 80-pin plastic qfp (fpt-80p-m06) dimensions in mm (inches) 80-pin plastic lqfp (fpt-80p-m11) (mounting height)
51 mb89150/150a series c 1995 fujitsu limited f80008s-2c-5 0.10(.004) 0.500.20(.020.008) 0.100.10 (.004.004) details of "a" part 0 10? 14.000.20(.551.008)sq 12.000.10(.472.004)sq 9.50 13.00 (.374) ref (.512) nom 0.500.08 (.0197.0031) .007 ?.001 +.003 ?0.03 +0.08 0.18 .005 ?.001 +.002 ?0.02 +0.05 0.127 .059 ?.004 +.008 ?0.10 +0.20 1.50 "a" 80 1 20 21 41 60 61 40 index (stand off) lead no. dimensions in mm (inches) 80-pin plastic lqfp (fpt-80p-m05) +0.40 C0.20 +.016 C.008 +0.40 C0.20 +.016 C.008 index typ 4.50(.177) typ 6.00(.236) index area 1.50(.059)typ 1.00(.040)typ typ 1.00(.040) typ 1.50(.059) (.0315.010) 0.800.25 1.20 .047 12.00(.472)typ (.0315.010) 0.800.25 ref 18.40(.724) (.016.004) 0.400.10 1.20 .047 (.016.004) 0.400.10 max 8.70(.343) (.006.002) 0.150.05 11.68(.460)typ 9.48(.373)typ 7.62(.300)typ 0.30(.012)typ (.050.005) 1.270.13 (.713.008) 18.120.20 typ 14.22(.560) typ 12.02(.473) typ 10.16(.400) typ 24.70(.972) (.878.013) 22.300.33 (.050.005) 1.270.13 typ 0.30(.012) index area 18.70(.736)typ (.642.013) 16.300.33 (.613.008) 15.580.20 1994 fujitsu limited m80001sc-4-2 c dimensions in mm (inches) 80-pin ceramic mqfp (mqp-80c-p01) (mounting height)
mb89150/150a series fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f 9804 ? fujitsu limited printed in japan

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